Design Engineer (MD)
Job Location: Bridgewater, NJ
Date Posted: 2020-03-11
(Rapid Design Group A)
State Machine analysis and implementation. Develop, analyze & debug Firmware and Register Transfer Language (RTL) for a product; work closely with divisions to create a link between analog/digital hardware and external interfaces; correctly validated and bug-free control of hardware determines success. Algorithm development, coding, and optimization for hardware-based implementation. Analysis with customers, and Marketing & Sales to determine best technical architecture to achieve an algorithm. If determined hardware implementation is required (FPGA, DSP, etc.), realize through design and development processes. Provide comprehensive module solution for the customer or strategic development; i.e., smart devices. Documentation - For rapid design, some parts of documentation must precede development, while other parts are written during development. In consideration of ISO 9001 - Product Realization for product design and quality control procedures are transferred for mass production. Comprehensive and understandable documentation determines success. Create software for proof of principle for hardware development of a product (User interface, Configuration, Calibration) for internal engineering and possible first level demo when little resources exist - example embedded system design. Rapid software development using in-house developed libraries and languages. Meeting tight project deadlines determines success. Training others to increase their skill set and share information. Classes, presentations, practice exercises are given to peers. Increased abilities and avoiding isolated knowledge mark success. PCB and layout design - Using layout design software and working closely with divisions. Hardware signal validation and evaluation by other experts determines success.
BSE/BE in Electrical Engineering or Computer Engineering with concentration in hardware design & software interaction with hardware. 3 years development experience with any combination of: Hardware Description Language (HDL, VHDL, Verilog); FPGA development; HDL simulation; FPGA debugging with embedded logic analyzer; Debug tools; Data processing algorithms, analysis techniques, optimization techniques; DSP theory, algorithm, and implementation; Boolean algebra; Device synchronization and state machine analysis; FPGA design and simulation; Digital circuit design; 3 yrs. knowledge of C/C++ programming language or may consider a strong candidate with Python and C# instead. Intermediate experience using oscilloscopes, DMM’s, logic analyzers, protocol analyzers, and other testing equipment. Intermediate understanding of digital logic concepts.
Multiple computer languages; Understand Linux, Windows, and CPU internals; Analog hardware fundamentals; Multiple communications protocols (USB, Camera Link, Coax Press, Thunderbolt, IEEE-1394, Lightning); Experience with interfacing peripherals to the bus level; Proficient at writing; Familiarity with CMOS/CCD sensor characteristics and how they operate; Experience with multiple HDL environments (Xilinx, Altera).
Please contact Marc Devito at firstname.lastname@example.org
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